Masahiro Yamada
6b6024eadb
There are two enable methods supported by ARM64 Linux; psci and
spin-table. The latter is simpler and helpful for quick SoC bring
up. My main motivation for this patch is to improve the spin-table
support, which allows us to boot an ARMv8 system without the ARM
Trusted Firmware.
Currently, we have multi-entry code in arch/arm/cpu/armv8/start.S
and the spin-table is supported in a really ad-hoc way, and I see
some problems:
- We must hard-code CPU_RELEASE_ADDR so that it matches the
"cpu-release-addr" property in the DT that comes from the
kernel tree.
- The Documentation/arm64/booting.txt in Linux requires that
the release address must be zero-initialized, but it is not
cared by the common code in U-Boot. We must do it in a board
function.
- There is no systematic way to protect the spin-table code from
the kernel. We are supposed to do it in a board specific manner,
but it is difficult to predict where the spin-table code will be
located after the relocation. So, it also makes difficult to
hard-code /memreserve/ in the DT of the kernel.
So, here is a patch to solve those problems; the DT is run-time
modified to reserve the spin-table code (+ cpu-release-addr).
Also, the "cpu-release-addr" property is set to an appropriate
address after the relocation, which means we no longer need the
hard-coded CPU_RELEASE_ADDR.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
63 lines
1.3 KiB
C
63 lines
1.3 KiB
C
/*
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* Copyright (c) 2013, Google Inc.
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*
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* Copyright (C) 2011
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* Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
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* - Added prep subcommand support
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* - Reorganized source - modeled after powerpc version
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fdt_support.h>
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#ifdef CONFIG_ARMV7_NONSEC
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#include <asm/armv7.h>
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#endif
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#include <asm/psci.h>
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#include <asm/spin_table.h>
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DECLARE_GLOBAL_DATA_PTR;
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int arch_fixup_fdt(void *blob)
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{
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bd_t *bd = gd->bd;
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int bank, ret;
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u64 start[CONFIG_NR_DRAM_BANKS];
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u64 size[CONFIG_NR_DRAM_BANKS];
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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start[bank] = bd->bi_dram[bank].start;
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size[bank] = bd->bi_dram[bank].size;
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#ifdef CONFIG_ARMV7_NONSEC
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ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
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if (ret)
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return ret;
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#endif
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}
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ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
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if (ret)
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return ret;
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#ifdef CONFIG_ARMV8_SPIN_TABLE
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ret = spin_table_update_dt(blob);
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if (ret)
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return ret;
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#endif
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#ifdef CONFIG_ARMV7_NONSEC
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ret = psci_update_dt(blob);
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if (ret)
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return ret;
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#endif
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return 0;
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}
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