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Author SHA1 Message Date
nearology 5ed71264bb dts: add EMAC configuration and syscon node for Allwinner V3s SoC 2026-05-12 13:15:05 +03:30
nearology b460a6597c add build guide for Lichee Pi Zero based on Allwinner V3s SoC 2026-05-12 12:01:49 +03:30
nearology 1c86fc4ded binman: update shebang to use specific Python version path 2026-05-12 12:01:39 +03:30
Icenowy Zheng dd6e8740dc Merge branch 'v3s-current' into v3s-spi-experimental
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-08-12 17:27:28 +08:00
Icenowy Zheng 32ab1804cd sunxi: fix SMP bit for V3s SoC
The cache of Cortex-A7 is only enabled if the SMP bit is set, but the
SMP bit of V3s is wrongly left unset, because I thought that it's not
SMP-capable.

Fix this.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-08-12 17:24:24 +08:00
Icenowy Zheng f03c1f5aea spi: sunxi: fix tx buf
After a fifo length of data is sent to tx fifo, the tx buffer should be
offseted.

Do this offset after the transfer.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-05-23 22:56:04 +08:00
Icenowy Zheng d3205f02ce sunxi: enable env on spi flash when spi flash is available
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-05-21 14:19:51 +08:00
Icenowy Zheng 24f72f61a9 sunxi: update defconfigs for Lichee Pi Zero for SPI
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-05-21 13:44:08 +08:00
Priit Laes 60f33d9d80 spl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXI
Fix typo introduced in ebc4ef61d7

Signed-off-by: Priit Laes <plaes@plaes.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-21 12:55:54 +08:00
Icenowy Zheng e11cd774f9 sunxi: enable SPL SPI for all sun8i SoCs
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2017-05-21 12:51:04 +08:00
12 changed files with 471 additions and 6 deletions
+384
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@@ -0,0 +1,384 @@
# U-Boot Build Guide for Lichee Pi Zero
## Introduction
This guide explains how to build U-Boot for the Lichee Pi Zero board based on the Allwinner V3s SoC.
U-Boot is the first-stage bootloader responsible for:
- Initializing hardware
- Loading the Linux kernel
- Preparing the boot environment
Older LicheePi U-Boot repositories are based on Python 2 and may not work correctly on modern Linux distributions without additional setup.
---
# What is Cross Compilation?
The Lichee Pi Zero uses an ARM CPU, but the build process usually runs on an x86_64 Linux PC.
Because of this, a cross compiler is required.
A cross compiler runs on your PC but generates binaries for ARM devices.
This project uses the following toolchain:
- gcc-linaro-6.3.1-2017.05
- Target architecture: `arm-linux-gnueabihf`
---
# Why Use pyenv?
Older U-Boot versions used in LicheePi projects depend on Python 2.
Modern Ubuntu and Debian releases no longer provide Python 2 packages directly:
```bash
sudo apt install python2
```
will fail on newer systems.
To solve this problem, we use `pyenv` to install and manage Python 2 locally.
Example:
```bash
pyenv install 2.7.18
pyenv local 2.7.18
```
Then build U-Boot using:
```bash
make PYTHON=$(pyenv which python)
```
---
# Install the Cross-Compile Toolchain
## Download the Toolchain
Download from one of the following sources:
- https://licheepizero.us/arm-linux-gnueabihf/
- https://releases.linaro.org/components/toolchain/binaries/6.3-2017.05/arm-linux-gnueabihf/
---
## Install the Toolchain
```bash
wget https://licheepizero.us/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf.tar.xz
```
```bash
tar xvf gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf.tar.xz
```
```bash
sudo mv gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf /opt/
```
---
# Add the Toolchain to PATH
Open the global bash configuration:
```bash
sudo nano /etc/bash.bashrc
```
Add this line:
```bash
PATH="$PATH:/opt/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin"
```
Reload the shell configuration:
```bash
source /etc/bash.bashrc
```
---
# Verify the Toolchain
```bash
arm-linux-gnueabihf-gcc -v
```
If GCC version information appears, the toolchain is installed correctly.
---
# Install Device Tree Compiler
```bash
sudo apt-get install device-tree-compiler
```
This package is required for compiling device tree files.
---
# Download and Build U-Boot
## Clone the Repository
Standard branch:
```bash
git clone https://github.com/Lichee-Pi/u-boot.git -b v3s-current
```
Experimental SPI branch:
```bash
git clone https://github.com/Lichee-Pi/u-boot.git -b v3s-spi-experimental
```
Then:
```bash
cd u-boot
```
---
# Select Board Configuration
Choose one of the available defconfig targets depending on your display.
## 800x480 LCD
```bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- LicheePi_Zero_800x480LCD_defconfig
```
## 480x272 LCD
```bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- LicheePi_Zero480x272LCD_defconfig
```
## No LCD
```bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- LicheePi_Zero_defconfig
```
---
# Optional Configuration Menu
You can customize the build configuration using:
```bash
make ARCH=arm menuconfig
```
From this menu you can:
- Enable or disable drivers
- Configure boot options
- Enable SPI flash support
- Change UART settings
- Enable debugging features
---
# Build U-Boot
## Standard Build
```bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
```
## Build With Log Output
```bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- 2>&1 | tee build.log
```
---
# Build Using pyenv Python
If the U-Boot tree requires Python 2:
```bash
make PYTHON=$(pyenv which python) ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
```
This ensures that tools such as `binman` use the Python version managed by pyenv.
---
# Build Output
After a successful build, the following file will be generated:
```text
u-boot-sunxi-with-spl.bin
```
This image contains:
- SPL
- U-Boot
- Device Tree
and can be written directly to the boot media.
---
# Flash U-Boot to SD Card
## Find the SD Card Device
Insert the SD card and run:
```bash
lsblk
```
Example output:
```text
sda 931G
├─sda1
sdb 16G
├─sdb1
```
Usually, `/dev/sdb` is the SD card.
Be very careful to select the correct device.
---
## Unmount SD Card Partitions
```bash
sudo umount /dev/sdb1
```
Or unmount all partitions:
```bash
sudo umount /dev/sdb*
```
---
## Write U-Boot with 8KB Offset
```bash
sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/sdb bs=1024 seek=8
```
Explanation:
| Parameter | Meaning |
|---|---|
| `if=` | Input file |
| `of=` | Output device |
| `bs=1024` | Block size = 1KB |
| `seek=8` | Start writing at 8KB offset |
The Allwinner BootROM expects the SPL at this offset.
---
## Flush Buffered Writes
```bash
sync
```
---
# Verify the Flash
You can inspect the beginning of the SD card:
```bash
sudo hexdump -C /dev/sdb | head
```
Or check partitions:
```bash
sudo fdisk -l /dev/sdb
```
---
# Boot Test
Insert the SD card into the board and connect UART.
If everything is correct, U-Boot logs should appear on the serial console.
---
# Common Errors
## Python 2 Syntax Errors
Example:
```text
SyntaxError: Missing parentheses in call to 'print'
```
Cause:
- Python 2 scripts executed using Python 3
Solutions:
- Use pyenv with Python 2
- Run `2to3`
- Patch the scripts manually
---
## Cross Compiler Not Found
Example:
```text
arm-linux-gnueabihf-gcc: command not found
```
Solutions:
- Verify PATH configuration
- Verify toolchain installation
---
# Summary
To successfully build U-Boot for the Lichee Pi Zero:
1. Install the ARM cross-compilation toolchain
2. Install the Device Tree Compiler
3. Clone the correct U-Boot repository
4. Use pyenv if Python 2 is required
5. Build the project
6. Flash the generated image to the SD card
After this step, you can continue with:
- Linux kernel compilation
- Root filesystem generation
- Embedded Linux setup
+12
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@@ -49,6 +49,7 @@
compatible = "licheepi,licheepi-zero", "allwinner,sun8i-v3s";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
spi0 = &spi0;
};
@@ -86,3 +87,14 @@
usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&emac {
phy = <&phy0>;
phy-mode = "mii";
allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
phy0: ethernet-phy@0 {
reg = <1>;
};
};
+30
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@@ -96,6 +96,11 @@
#size-cells = <1>;
ranges;
syscon: syscon@01c00000 {
compatible = "allwinner,sun8i-h3-syscon","syscon";
reg = <0x01c00000 0x34>;
};
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@@ -208,6 +213,17 @@
interrupt-controller;
#interrupt-cells = <3>;
emac_rgmii_pins: emac0@0 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3",
"PD4", "PD5", "PD7",
"PD8", "PD9", "PD10",
"PD12", "PD13", "PD15",
"PD16", "PD17";
allwinner,function = "emac";
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0@0 {
pins = "PB8", "PB9";
function = "uart0";
@@ -275,6 +291,20 @@
status = "disabled";
};
emac: ethernet@1c30000 {
compatible = "allwinner,sun8i-h3-emac";
reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
reg-names = "emac", "syscon";
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
reset-names = "ahb", "ephy";
clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
clock-names = "ahb", "ephy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
+2 -3
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@@ -184,11 +184,10 @@ void s_init(void)
/* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */
#endif
#if (defined CONFIG_MACH_SUN6I || \
#if defined CONFIG_MACH_SUN6I || \
defined CONFIG_MACH_SUN7I || \
defined CONFIG_MACH_SUN8I || \
defined CONFIG_MACH_SUN9I) && \
!defined CONFIG_MACH_SUN8I_V3S
defined CONFIG_MACH_SUN9I
/* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
asm volatile(
"mrc p15, 0, r0, c1, c0, 1\n"
@@ -14,6 +14,14 @@ CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_FPGA is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_NETDEVICES is not set
CONFIG_DM_SPI=y
CONFIG_SUNXI_SPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -14,6 +14,14 @@ CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_FPGA is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_NETDEVICES is not set
CONFIG_DM_SPI=y
CONFIG_SUNXI_SPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
+8
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@@ -9,6 +9,14 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_FPGA is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_NETDEVICES is not set
CONFIG_DM_SPI=y
CONFIG_SUNXI_SPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
+1 -1
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@@ -132,7 +132,7 @@ if SPL
config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL"
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_H3 || MACH_SUN50I
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
---help---
Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does
+1 -1
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@@ -284,4 +284,4 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
return 0;
}
/* Use priorty 0 to override the default if it happens to be linked in */
SPL_LOAD_IMAGE_METHOD("sunxi SPI" 0, BOOT_DEVICE_SPI, spl_spi_load_image);
SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image);
+3
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@@ -273,6 +273,9 @@ static int sunxi_spi_xfer(struct udevice *dev, unsigned int bitlen,
}
len -= nbytes;
if (tx_buf)
tx_buf += nbytes;
}
if (flags & SPI_XFER_END)
+13
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@@ -191,6 +191,19 @@
#define CONFIG_FAT_WRITE /* enable write access */
/* SPI Flash environment */
#ifdef CONFIG_SPI_FLASH
#undef CONFIG_ENV_SIZE
#define CONFIG_ENV_SIZE 0x8000
#define CONFIG_ENV_SECT_SIZE 0x1000
#ifdef CONFIG_ENV_IS_IN_MMC
#undef CONFIG_ENV_IS_IN_MMC
#endif
#define CONFIG_ENV_IS_IN_SPI_FLASH
#undef CONFIG_ENV_OFFSET
#define CONFIG_ENV_OFFSET 0x000f8000
#endif
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_LOAD_IMAGE
+1 -1
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@@ -1,4 +1,4 @@
#!/usr/bin/python
#!/home/nearology/.pyenv/versions/2.7.18/bin/python
# Copyright (c) 2016 Google, Inc
# Written by Simon Glass <sjg@chromium.org>