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USB/OHCI: endianness cleanup in the generic ohci driver

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This commit is contained in:
Markus Klotzbuecher
2007-06-06 11:49:35 +02:00
committed by Markus Klotzbuecher
parent 18135125f9
commit fc43be478f
2 changed files with 63 additions and 70 deletions
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doc/README.generic_usb_ohci
+34 -17
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@@ -9,35 +9,52 @@ into cpu/board directories and are called via the hooks below.
Configuration options
----------------------
CONFIG_USB_OHCI_NEW: enable the new OHCI driver
CONFIG_USB_OHCI_NEW: enable the new OHCI driver
CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
- extern int usb_board_init(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);
- extern int usb_board_init(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);
CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
- extern int usb_cpu_init(void);
- extern int usb_cpu_stop(void);
- extern int usb_cpu_init_fail(void);
- extern int usb_cpu_init(void);
- extern int usb_cpu_stop(void);
- extern int usb_cpu_init_fail(void);
CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers
CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI
registers
CFG_USB_OHCI_SLOT_NAME: slot name
CFG_USB_OHCI_SLOT_NAME: slot name
CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub.
CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
root hub.
Endianness issues
------------------
The LITTLEENDIAN #define determines if the 'swap_16' and 'swap_32'
macros do byte swapping or not. But some cpus OHCI-controllers such as
ppc4xx and mpc5xxx operate in little endian mode, so some extra ifdefs
were necessary to make this work.
The USB bus operates in little endian, but unfortunately there are
OHCI controllers that operate in big endian such as ppc4xx and
mpc5xxx. For these the config option
CFG_OHCI_BE_CONTROLLER
needs to be defined.
PCI Controllers
----------------
You'll need to define
CONFIG_PCI_OHCI
PCI Controllers need to do byte swapping on register accesses, so they
should to define:
CFG_OHCI_SWAP_REG_ACCESS