arm: imx: add i.MX6SLL EVK board support
Add i.MX6SLL EVK board support. 1. Add imx6sll-evk device tree. 2. Enable SDHC/I2C/UART. 3. Enable REGULATOR/PMIC/I2C/GPIO/SDHC/PINCTRL driver. Boot Log: U-Boot 2016.11-00127-gc635871-dirty (Nov 24 2016 - 13:28:19 +0800) CPU: Freescale i.MX6SLL rev1.0 at 792MHz CPU: Commercial temperature grade (0C to 95C)Reset cause: POR Model: Freescale i.MX6SLL EVK Board Board: MX6SLL EVK DRAM: 2 GiB i2c bus 0 at 35258368, no gpio pinctrl state. PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan
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if TARGET_MX6SLLEVK
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config SYS_BOARD
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default "mx6sllevk"
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config SYS_VENDOR
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default "freescale"
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config SYS_CONFIG_NAME
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default "mx6sllevk"
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endif
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@@ -0,0 +1,6 @@
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# (C) Copyright 2016 Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := mx6sllevk.o
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@@ -0,0 +1,121 @@
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Refer docs/README.imxmage for more details about how-to configure
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* and create imximage boot image
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*
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* The syntax is taken as close as possible with the kwbimage
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*/
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#define __ASSEMBLY__
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#include <config.h>
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/* image version */
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IMAGE_VERSION 2
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/*
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* Boot Device : one of
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* spi, sd (the board has no nand neither onenand)
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*/
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BOOT_FROM sd
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#ifdef CONFIG_SECURE_BOOT
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CSF CONFIG_CSF_SIZE
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#endif
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/*
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* Device Configuration Data (DCD)
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*
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* Each entry must have the format:
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* Addr-type Address Value
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*
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* where:
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* Addr-type register length (1,2 or 4 bytes)
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* Address absolute address of the register
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* value value to be stored in the register
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*/
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/* Enable all clocks */
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DATA 4 0x020c4068 0xffffffff
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DATA 4 0x020c406c 0xffffffff
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DATA 4 0x020c4070 0xffffffff
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DATA 4 0x020c4074 0xffffffff
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DATA 4 0x020c4078 0xffffffff
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DATA 4 0x020c407c 0xffffffff
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DATA 4 0x020c4080 0xffffffff
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DATA 4 0x020E0550 0x00080000
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DATA 4 0x020E0534 0x00000000
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DATA 4 0x020E02AC 0x00000030
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DATA 4 0x020E0548 0x00000030
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DATA 4 0x020E052C 0x00000030
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DATA 4 0x020E0530 0x00020000
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DATA 4 0x020E02B0 0x00003030
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DATA 4 0x020E02B4 0x00003030
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DATA 4 0x020E02B8 0x00003030
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DATA 4 0x020E02BC 0x00003030
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DATA 4 0x020E0540 0x00020000
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DATA 4 0x020E0544 0x00000030
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DATA 4 0x020E054C 0x00000030
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DATA 4 0x020E0554 0x00000030
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DATA 4 0x020E0558 0x00000030
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DATA 4 0x020E0294 0x00000030
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DATA 4 0x020E0298 0x00000030
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DATA 4 0x020E029C 0x00000030
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DATA 4 0x020E02A0 0x00000030
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DATA 4 0x020E02C0 0x00082030
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DATA 4 0x021B001C 0x00008000
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DATA 4 0x021B0800 0xA1390003
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DATA 4 0x021B085c 0x084700C7
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DATA 4 0x021B0890 0x00400000
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DATA 4 0x021B0848 0x3F393B3C
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DATA 4 0x021B0850 0x262C3826
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DATA 4 0x021B081C 0x33333333
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DATA 4 0x021B0820 0x33333333
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DATA 4 0x021B0824 0x33333333
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DATA 4 0x021B0828 0x33333333
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DATA 4 0x021B082C 0xf3333333
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DATA 4 0x021B0830 0xf3333333
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DATA 4 0x021B0834 0xf3333333
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DATA 4 0x021B0838 0xf3333333
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DATA 4 0x021B08C0 0x24922492
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DATA 4 0x021B08b8 0x00000800
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DATA 4 0x021B0004 0x00020052
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DATA 4 0x021B000C 0x53574333
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DATA 4 0x021B0010 0x00100B22
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DATA 4 0x021B0038 0x00170778
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DATA 4 0x021B0014 0x00C700DB
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DATA 4 0x021B0018 0x00201718
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DATA 4 0x021B002C 0x0F9F26D2
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DATA 4 0x021B0030 0x009F0E10
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DATA 4 0x021B0040 0x0000005F
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DATA 4 0x021B0000 0xC4190000
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DATA 4 0x021B083C 0x20000000
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DATA 4 0x021B001C 0x00008050
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DATA 4 0x021B001C 0x00008058
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DATA 4 0x021B001C 0x003F8030
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DATA 4 0x021B001C 0x003F8038
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DATA 4 0x021B001C 0xFF0A8030
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DATA 4 0x021B001C 0xFF0A8038
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DATA 4 0x021B001C 0x04028030
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DATA 4 0x021B001C 0x04028038
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DATA 4 0x021B001C 0x83018030
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DATA 4 0x021B001C 0x83018038
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DATA 4 0x021B001C 0x01038030
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DATA 4 0x021B001C 0x01038038
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DATA 4 0x021B0020 0x00001800
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DATA 4 0x021B0800 0xA1390003
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DATA 4 0x021B0004 0x00020052
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DATA 4 0x021B0404 0x00011006
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DATA 4 0x021B001C 0x00000000
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@@ -0,0 +1,131 @@
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <asm/imx-common/boot_mode.h>
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#include <asm/io.h>
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#include <common.h>
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#include <linux/sizes.h>
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#include <mmc.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#include "../common/pfuze.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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return 0;
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}
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX6_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static iomux_v3_cfg_t const wdog_pads[] = {
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MX6_PAD_WDOG_B__WDOG1_B | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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#ifdef CONFIG_DM_PMIC_PFUZE100
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int power_init_board(void)
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{
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struct udevice *dev;
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int ret;
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u32 dev_id, rev_id, i;
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u32 switch_num = 6;
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u32 offset = PFUZE100_SW1CMODE;
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ret = pmic_get("pfuze100", &dev);
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if (ret == -ENODEV)
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return 0;
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if (ret != 0)
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return ret;
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dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
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rev_id = pmic_reg_read(dev, PFUZE100_REVID);
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printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
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/* Init mode to APS_PFM */
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pmic_reg_write(dev, PFUZE100_SW1ABMODE, APS_PFM);
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for (i = 0; i < switch_num - 1; i++)
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pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM);
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/* set SW1AB staby volatage 0.975V */
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pmic_clrsetbits(dev, PFUZE100_SW1ABSTBY, 0x3f, 0x1b);
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/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
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pmic_clrsetbits(dev, PFUZE100_SW1ABCONF, 0xc0, 0x40);
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/* set SW1C staby volatage 0.975V */
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pmic_clrsetbits(dev, PFUZE100_SW1CSTBY, 0x3f, 0x1b);
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/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
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pmic_clrsetbits(dev, PFUZE100_SW1CCONF, 0xc0, 0x40);
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return 0;
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}
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#endif
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: MX6SLL EVK\n");
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return 0;
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}
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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int mmc_map_to_kernel_blk(int devno)
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{
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return devno;
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}
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