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x86: quark: Implement PIRQ routing

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Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng
2015-05-25 22:35:06 +08:00
committed by Simon Glass
parent 5910955f3c
commit 05b98ec346
6 changed files with 125 additions and 15 deletions
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configs/galileo_defconfig
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@@ -6,3 +6,4 @@ CONFIG_TARGET_GALILEO=y
CONFIG_CMD_NET=y
CONFIG_OF_CONTROL=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GENERATE_PIRQ_TABLE=y